dsi
DSI specifies the interface between a host processor and a peripheral such as a display module.
On the transmitter side of a DSI Link, parallel data, signal events, and commands are converted in the Protocol layer to packets, following the packet organization documented in this section. The Protocol layer APPends packet-protocol information and headers, and then sends complete bytes through the Lane Management layer to the PHY.
DSI-compliant peripherals support either of two basic modes of operation: Command Mode and Video Mode. Which mode is used depends on the architecture and capabilities of the peripheral.
Command Mode
Command Mode refers to operation in which transactions primarily take the form of sending commands and data to a peripheral, such as a display module, that incorporates a display controller. The display controller may include local registers and a frame buffer. Systems using Command Mode write to, and read from, the registers and frame buffer memory. The host processor indirectly controls activity at the peripheral by sending commands, parameters and data to the display controller. The host processor can also read display module status information or the contents of the frame memory. Command Mode operation requires a bidirectional interface.
Video Mode
Video Mode refers to operation in which transfers from the host processor to the peripheral take the form of a real-time pixel stream. In normal operation, the display module relies on the host processor to provide image data at sufficient bandwidth to avoid flicker or other visible artifacts in the displayed image. Video information should only be transmitted using High Speed Mode.
enables the peripheral to accurately reconstruct original video timing, including sync pulse widths.
• Non-Burst Mode with Sync Events
similar to above, but accurate reconstruction of sync pulse widths is not required, so a singleSync Eventis substituted.
• Burst mode
RGB pixel packets are time-compressed, leaving more time during a scan line for LP mode (saving power) or for multiplexing other transmissions onto the DSI link.
HS transmission
LPS --> SoT --> SP/LgP --> EoT --> LPS
Long Packet Format
A Long packet shall consist of three elements: a 32-bit Packet Header (PH), an application-specific Data Payload with a variable number of bytes, and a 16-bit Packet Footer (PF). The Packet Header is further composed of three elements: an 8-bit Data Identifier, a 16-bit word Count, and 8-bit ECC. The Packet Footer has one element, a 16-bit checksum. Long packets can be from 6 to 65,541 bytes in length.
Short Packet Format
A Short packet shall contain an 8-bit Data ID followed by two command or data bytes and an 8-bit ECC; a Packet Footer shall not be present. Short packets shall be four bytes in length.
Data Identifier Byte
The Data Type field specifies if the packet is a Long or Short packet type and the packet format.
Processor to Peripheral Direction (Processor-Sourced) Packet Data types
Peripheral-to-Processor (Reverse Direction) LP Transmissions
Peripheral-to-processor transactions are of four basic types:
1）Tearing Effect (TE)is a Trigger message sent to convey display timing information to the host processor.Triggermessages are single byte packets sent by a peripheral’s PHY layer in response to a signal from the DSI protocol layer.
•Byte 0: 01011101 (shown here in first bit [left] to last bit [right] sequence)
2）Acknowledgeis a Trigger Message sent when the current transmission, as well as all preceding transmissions since the last peripheral to host communication.
•Byte 0: 00100001 (shown here in first bit [left] to last bit [right] sequence)
3） Acknowledge and ERROR Reportis a Short packet sent if any errors were detected in preceding transmissions from the host processor. Once reported, accumulated errors in the error register are cleared.
•Byte 0: Data Identifier (virtual Channel ID + Acknowledge Data Type)
•Byte 1: Error Report bits 0-7
• Byte 2: Error Report bits 8-15
•ECC byte covering the header
4）Response to Read requestmay be a Short or Long packet that returns data requested by the preceding READ command from the processor.
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